Apple II Csa2 FAQs: Sound & Music, Part 19/25
The second set of DIP swithces (close to the front of the card) is for generating Maskable (IRQ) and Non Maskable (NMI) interrupts from the 6551 Asynchronous Communications Interface adapter (ACIA) chip and the 6818 clock chip. The swithces select the type and source of interrupt request. Normally all switches are in the OPEN position.
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